Journal of Smart Sensors and Computing Cover
ISSN: 3108-2459

Journal of Smart Sensors and Computing

Dr. Thittaporn Ganokratanaa
Editor-in-Chief
Dr. Thittaporn Ganokratanaa

A multidisciplinary, peer-reviewed, quarterly, open-access journal dedicated to advancing research and innovation in sensor technologies and computational methods.

Research Article* Open AccessCCBYNCPublished online: 23 December 2025

The Unified Neuromorphic Assembly Layer for Hardware-Agnostic Compilation in Neuromorphic Computing

Ganesh D. Jadhav, Rahul V. Dagade, Sushant Jakhade, Kshitij Jadhav, Rutu Hinge, Swarada Joshi

1 Department of Information Technology, Vishwakarma Institute of Technology, Pune, Maharashtra, 411037, India

2 Department of Computer Engineering, Vishwakarma Institute of Technology, Pune, Maharashtra, 411037, India

*Email: jadhavganesh874@gmail.com

J. Smart Sens. Comput., 2025, 1(3), 25212 https://doi.org/10.64189/ssc.25212

Received: 14 November 2025 | Revised: 20 December 2025 | Accepted: 22 December 2025

Cite article

G. D. Jadhav, R. V. Dagade, S. Jakhade, K. Jadhav, R. Hinge, S. Joshi, The unified neuromorphic assembly layer for hardware-agnostic compilation in neuromorphic computing, Journal of Smart Sensors and Computing, 2025, 1(3), 25212, doi: . https://doi.org/10.64189/ssc.25212

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(c) The Author(s) 2025.

CC BY-NC 4.0

Open Access

This article is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License, which permits the non-commercial use, sharing, adaptation, distribution and reproduction in any medium or format, as long as appropriate credit is given and changes are indicated. https://creativecommons.org/licenses/by-nc/4.0/

Abstract

The programming of neuromorphic assembly has advanced steadily, providing essential tools and paradigms to help connect the gap between abstract Spiking Neural Network (SNN) models and brain-inspired computing hardware. This work presents UNAL (Unified Adaptive, Hardware-Agnostic Neuromorphic Assembly Layer). This compilation framework translates high-level Spiking Neural Network (SNN) models into portable, spike-level assembly across heterogeneous neuromorphic platforms. UNAL introduces a unified intermediate representation (UNAL-IR), a compact instruction set, and an optimization-driven mapping pipeline that jointly addresses latency, energy efficiency, routing congestion, and adaptability. Quantitative evaluation on standard SNN benchmarks (DVS Gesture and CIFAR-10 SNN) mapped to Intel Loihi 2 demonstrates 18–32% latency reduction, 21–38% energy savings, and 25–40% lower routing congestion compared to Loihi-native and platform-specific tool chains. A smart-city surveillance case study further validates the deployment of real-time edge computing. These results establish UNAL as a scalable and future-ready neuromorphic compiler infrastructure.

Graphical Abstract

The Unified Neuromorphic Assembly Layer for Hardware-Agnostic Compilation in Neuromorphic Computing graphical abstract

Novelty Statement

This work introduces a hardware-agnostic neuromorphic compilation approach that unifies heterogeneous SNN execution models, supports adaptive neural dynamics, and automates spike-level instruction synthesis.